/*
 * FreeRTOS Kernel V10.5.0
 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
 *
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy of
 * this software and associated documentation files (the "Software"), to deal in
 * the Software without restriction, including without limitation the rights to
 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 * the Software, and to permit persons to whom the Software is furnished to do so,
 * subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in all
 * copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * https://www.FreeRTOS.org
 * https://github.com/FreeRTOS
 *
 */
/* Including FreeRTOSConfig.h here will cause build errors if the header file
contains code not understood by the assembler - for example the 'extern' keyword.
To avoid errors place any such code inside a #ifdef __ICCARM__/#endif block so
the code is included in C files but excluded by the preprocessor in assembly
files (__ICCARM__ is defined by the IAR C compiler but not by the IAR assembler. */
#include "FreeRTOSConfig.h"

	EXTERN pxCurrentTCB
	EXTERN CSTACK$$Limit
	EXTERN CSTACK$$Base

	PUBLIC vStoreDSRAMContextWithWFI
	PUBLIC vRestoreDSRAMContext

/*-----------------------------------------------------------*/

	SECTION .cy_os_common:CODE:NOROOT(2)
	THUMB
/*-----------------------------------------------------------*/
vStoreDSRAMContextWithWFI:
	stmdb sp!, {r1-r11, lr}					/* Store reg on the stack*/
	mrs r1, psplim							/* r1 = PSPLIM. */
	mrs r2, control							/* r2 = Control. */
	adr r3, wfi_exit+4
	stmdb sp!, {r1-r3}						/* Store on the stack - PSPLIM, Control and Return Address */
	ldr r2, =pxCurrentTCB					/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
	ldr r1, [r2]							/* Read pxCurrentTCB. */
	mrs r0, psp								/* Read PSP in r0 */
	str r0, [r1]							/* Save the new top of stack in TCB. */
	wfi
	isb
	add  sp, sp, #12						/* We do not enter DSRAM pop-out PSPLIM, Control, Return Address*/
wfi_exit:
	dsb
	ldmia sp!, {r1-r11, pc}
/*-----------------------------------------------------------*/

vRestoreDSRAMContext:
	ldr r2, =pxCurrentTCB				    /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
	ldr r1, [r2]							/* Read pxCurrentTCB. */
	ldr r0, [r1]							/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
	ldmia r0!, {r1-r3}						/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR */
	msr psplim, r1							/* Restore the PSPLIM register value for the task. */
	msr psp, r0								/* restore stacks */
	ldr r0, =CSTACK$$Limit
	msr msp, r0
	ldr r1, =CSTACK$$Base
	msr msplim, r1
	msr CONTROL, r2
	isb
	bx r3
/*-----------------------------------------------------------*/

	END
